07/01/2024 - 13/01/2024

07/01/2024 22:43

Tried booting a clean install of Rocky Linux 9.3 (no other OSes) on the newest computer in in CP263. I could not get it to boot with a GUI, only command line. The issue is unclear, going to try using Linux Mint instead...

07/01/2024 22:46

Linux Mint seems to not have the same GUI issues. Maybe its' a GNOME vs Cinnamon issue? For now, I'm going to leave the system in Linux Mint.

08/01/2024 19:04

Vivado 2023.2 install on linux mint failed near the end due to a checksum error (4 hours down the drain). Will try installing version 2017.3 before I leave tonight

08/01/2024 19:39

"Also - just checking - the switch S1 for downloading the bitstream via the jtag is slid to off after programming - right?"

This switch seems to be covered and very small. The tutorial makes no mention of it.

"A soft-reset after the host is powered up helps the host detect FPGA-based PCIe devices"

The part abouts saying the host detects the FPGA really makes me think they mean reset your computer (or your server, in more sophisticated cases). As our computer is our host here. In any event, hitting that restart swtich on the board doesn't appear to do anything.
"Nereid features a Push-button S2 normally meant to be used as a “Reset” signal for designs running on FPGA. Push-button S2 is connected to FPGA pin C26. Push-button S2 is active-high, and users need to enable FPGA’s internal Pulldown on the pin C26 to use the pushbutton correctly. This pushbutton can also be used for any other input and is not just limited to be used as a Reset signal." (https://numato.com/docs/nereid-kintex-7-pci-express-development-board/)
This paragraph seems to suggest the reset button needs to be programmed first. It's unclear to me whether that programming is doing in the tutorial.

08/01/2024 20:41

Entropy Calculation

Because our endoing is lossless, we can look at the distribution fo our residuals and apply the first order entropy calculation in this link:
https://faculty.uml.edu/jweitzen/16.548/classnotes/Theory of Data Compression.htm#:~:text=When the compression is lossless,rate is the entropy rate.
See section III, B

09/01/2024 23:01

Vivado failed to install one again "Generating installed device list". I have downloaded some packages with sudo apt install or whatever

  1. libncurses5-dev
  2. libncursesw5-dev
  3. libncurses5
  4. libtinfo5
  5. libtinfo-dev
  6. python3-pip

Supposedly after restarting the computer, the installation will no longer break here. It's a painful error because it takes several hours to even get to the point where it breaks.

09/01/2024 23:30

With a jewler's screwdriver I can flip teh switch S1. Whether it's in the "ON" or "OFF" state doesn't seem to affect anything, including whether I can program it or not. I've tried

  1. Switching while the computer is on with platform cable connected
  2. Switching while the computer is off then rebooting with the platform cable connected
  3. Switching while the computer is on with the platform cable disconnected
  4. Siwtching while the computer is off then rebooting with the platform cable disconnected

09/01/2024 23:47

lspci no longer shows 05:00.0 Memory Controller: Xilinx Corporation Device 7024 when I reboot with teh Platform cable disconnected, which is unexpected (an potentially bad?)

I got lspci to once again show 05:00.0 Memory Controller: Xilinx Corporation Device 7024 return by unplugging the xilinx connector cable after a shutdown, making sure S1 is in the "OFF" position. I'm unsure what I did differently in this case.

I think somehow the act of autoconnecting to the hardware with vivado reset it, the resetting the computer helps register it as a pci device.

09/01/2024 23:56

By spamming lspci while configuring the memory device in vivado, I notice that 05:00.0 Memory Controller: Xilinx Corporation DEvice 7024--> 05:00.0 Memory Controller: Xilinx Corporation DEvice 7024 (rev ff) which makes me think some specific bits were changed

10/01/2024 00:09

Before uploading bistream
lspci -vv yields:

05:00.0 Memory controller: Xilinx Corporation Device 7024
        Subsystem: Xilinx Corporation Device 0007
        Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Interrupt: pin A routed to IRQ 255
        Region 0: Memory at 51100000 (32-bit, non-prefetchable) [disabled] [size=512K]
        Capabilities: [40] Power Management version 3
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
                Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [48] MSI: Enable- Count=1/1 Maskable- 64bit+
                Address: 0000000000000000  Data: 0000
        Capabilities: [60] Express (v2) Endpoint, MSI 00
                DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <64ns, L1 unlimited
                        ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 25.000W
                DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
                        RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
                        MaxPayload 256 bytes, MaxReadReq 512 bytes
                DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
                LnkCap: Port #0, Speed 5GT/s, Width x4, ASPM L0s, Exit Latency L0s unlimited
                        ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
                LnkCtl: ASPM Disabled; RCB 64 bytes, Disabled- CommClk+
                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed 5GT/s (ok), Width x1 (downgraded)
                        TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
                DevCap2: Completion Timeout: Range B, TimeoutDis- NROPrPrP- LTR-
                         10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix-
                         EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
                         FRS- TPHComp- ExtTPHComp-
                         AtomicOpsCap: 32bit- 64bit- 128bitCAS-
                DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- OBFF Disabled,
                         AtomicOpsCtl: ReqEn-
                LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
                         Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
                         Compliance De-emphasis: -6dB
                LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-
                         EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
                         Retimer- 2Retimers- CrosslinkRes: unsupported
        Capabilities: [100 v1] Device Serial Number 00-00-00-01-01-00-0a-35
05:00.0 Memory controller: Xilinx Corporation Device 7024
        Subsystem: Xilinx Corporation Device 0007
        Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Interrupt: pin A routed to IRQ 255
        Region 0: Memory at 51100000 (32-bit, non-prefetchable) [disabled] [size=512K]
        Capabilities: [40] Power Management version 3
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
                Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [48] MSI: Enable- Count=1/1 Maskable- 64bit+
                Address: 0000000000000000  Data: 0000
        Capabilities: [60] Express (v2) Endpoint, MSI 00
                DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <64ns, L1 unlimited
                        ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 25.000W
                DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
                        RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
                        MaxPayload 256 bytes, MaxReadReq 512 bytes
                DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
                LnkCap: Port #0, Speed 5GT/s, Width x4, ASPM L0s, Exit Latency L0s unlimited
                        ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
                LnkCtl: ASPM Disabled; RCB 64 bytes, Disabled- CommClk+
                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed 5GT/s (ok), Width x1 (downgraded)
                        TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
                DevCap2: Completion Timeout: Range B, TimeoutDis- NROPrPrP- LTR-
                         10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix-
                         EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
                         FRS- TPHComp- ExtTPHComp-
                         AtomicOpsCap: 32bit- 64bit- 128bitCAS-
                DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- OBFF Disabled,
                         AtomicOpsCtl: ReqEn-
                LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
                         Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
                         Compliance De-emphasis: -6dB
                LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-
                         EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
                         Retimer- 2Retimers- CrosslinkRes: unsupported
        Capabilities: [100 v1] Device Serial Number 00-00-00-01-01-00-0a-35

and

root@pioneer-MS-7D41:/home/pioneer# echo 1 > /sys/bus/pci/devices/0000:05:00.0/reset
root@pioneer-MS-7D41:/home/pioneer#
root@pioneer-MS-7D41:/home/pioneer# echo 1 > /sys/bus/pci/devices/0000:05:00.0/reset
root@pioneer-MS-7D41:/home/pioneer#

After uploading bitstream:
lspci -vv yields:

05:00.0 Memory controller: Xilinx Corporation Device 7024 (rev ff) (prog-if ff)
        !!! Unknown header type 7f
05:00.0 Memory controller: Xilinx Corporation Device 7024 (rev ff) (prog-if ff)
        !!! Unknown header type 7f

and

root@pioneer-MS-7D41:/home/pioneer# echo 1 > /sys/bus/pci/devices/0000:05:00.0/reset
bash: echo: write error: Inappropriate ioctl for device
root@pioneer-MS-7D41:/home/pioneer# echo 1 > /sys/bus/pci/devices/0000:05:00.0/reset
bash: echo: write error: Inappropriate ioctl for device

10/01/2024 21:04

Vivado 2023.2 successfully installed this time.

10/01/2024 21:13

I noticed there are three different FPGA versions for this board
9ddb903a94a08e5d354e7480a5ecfb59.png
And each corresponds to it's own board layout in Vivado
e2c640714ec192f63b07a207a577bb63.png
I've been selecting the red option (which looks like it corresponds to 160T).I noticed a checkmark on the packaging for 160T, so I believe I have been selecting the correct board.

10/01/2024 21:57

I can't really make any sense of the readback, but I was able to generate a readback file.

First 10 lines:

root@pioneer-MS-7D41:/tools/Xilinx/Vivado/2023.2/pcie_7x_0_ex/pcie_7x_0_ex.runs/impl_1# cat xilinx_pcie_2_1_ep_7x_readback | head -n 10
:020000040000FA
:10000000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF00
:10001000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF0
:10002000000000BB11220044FFFFFFFFFFFFFFFFA6
:10003000AA9955662000000030022001000000004F
:1000400030020001000000003000800100000000CC
:1000500020000000300080010000000720000000A8
:10006000200000003002600100000000300120018B
:1000700002223FE53001C001000000003001800194
:100080000364C093300080010000000920000000DC
root@pioneer-MS-7D41:/tools/Xilinx/Vivado/2023.2/pcie_7x_0_ex/pcie_7x_0_ex.runs/impl_1# cat xilinx_pcie_2_1_ep_7x_readback | head -n 10
:020000040000FA
:10000000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF00
:10001000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF0
:10002000000000BB11220044FFFFFFFFFFFFFFFFA6
:10003000AA9955662000000030022001000000004F
:1000400030020001000000003000800100000000CC
:1000500020000000300080010000000720000000A8
:10006000200000003002600100000000300120018B
:1000700002223FE53001C001000000003001800194
:100080000364C093300080010000000920000000DC

last 10 lines:

root@pioneer-MS-7D41:/tools/Xilinx/Vivado/2023.2/pcie_7x_0_ex/pcie_7x_0_ex.runs/impl_1# cat xilinx_pcie_2_1_ep_7x_readback | tail -n 10
:10FF7000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF91
:10FF8000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF81
:10FF9000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF71
:10FFA000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF61
:10FFB000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF51
:10FFC000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF41
:10FFD000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF31
:10FFE000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF21
:10FFF000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF11
:00000001FF
root@pioneer-MS-7D41:/tools/Xilinx/Vivado/2023.2/pcie_7x_0_ex/pcie_7x_0_ex.runs/impl_1# cat xilinx_pcie_2_1_ep_7x_readback | tail -n 10
:10FF7000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF91
:10FF8000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF81
:10FF9000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF71
:10FFA000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF61
:10FFB000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF51
:10FFC000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF41
:10FFD000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF31
:10FFE000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF21
:10FFF000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF11
:00000001FF